Good morning everyone. Today I'm excited to present our work on AI power observability and semiconductor design, and how it's driving real time insights and up to 40% fast design cycles through advanced monitoring and analytics. So let's begin by looking at the challenges our industry faces. Currently, 87% of our semiconductor projects experience delays and exceeding budgets. Often by several million dollars. These setbacks have a direct impact on time to market profitability and innovation velocity. But here's the opportunity. With AI driven, we have a potential to reduce design cycles by 40%. Fundamentally changing the pace and efficiency of chief development now. Exactly. Do we have. AI observability. The approach delivers tangible improvements in design cycle time, power consumption, and manufacturing yield. These aren't just metrics. They transfer directly into a faster product launches, lower operational cost, and better performing chips in the field. So let's drive into how we achieve this. First, design automation monitoring. Our AI powered monitoring system significantly reduces design, providing real time feedback to catch issues early by optimizing workload dynamically. And then we announce computational efficiency across teams second productive telemetric systems. We use real time pattern recognition to detect critical design anomalies with multidimensional data and sensor networks, we reduce physical testing needs while improving fall detection electricity. Third, automated design rule verification. Our tools achieve improved error detection by continuously scanning and learning from complex design patterns. AI not only flags issues, but suggest mark context of our fixes and optimization based in industry standards. Four, performance and power optimization. Through real time monitoring, we deliver immediate throughput improvements and intelligent power management. We are enabling active frequency, scaling action, and proactive thermal management, all critical for modern power, low power designs. Fifth simulation. Using digital twin environments, we achieve near total test coverage, enabling massive power simulations. This reduces cycle time and integrates insight across electrical, thermal, and mechanical domains. Sixth yield optimization. We are tapping into over a hundred process parameters through manufacturing, telemetry. Machine learning helps identify different patterns with higher accuracy and enables automated unit for higher yields and reduced calibration. Seventh edge device performance. Our system collects telemetry from deployed chips under real world conditions. This enables dynamic optimization, boost ML performance, and extends battery life without sacrificing functionality. So how do we implement all of this? The roadmap assessment phase, we start with detailed cap analysis and define measurable KPIs. Integration phase. Next, we roll out Observ tools with minimal workflow disruption backed by team training, third optimization phase. Finally, we use AI insight to define process, build productive models, and share knowledge across products. In conclusion, AI power is no longer a feature concept. It's practical. I impact solution that is already arriving faster, design cycles, better products, and smart engine. Thank you. Thank you for your time and thank you for listening.